Zhong Feng Wang received his BS and MSEE degrees both from Tsinghua University, Beijing. He obtained the Ph.D. degree from the University of Minnesota, Minneapolis, in 2000. He worked for many years at Nanjing University, China, as a Distinguished Professor[1] since 2016. Previously he worked for Broadcom Corporation, California, from 2007 to 2016 as a technical director. Even earlier, he worked for National Semiconductor Corporation and Oregon State University successively.

He is a world-recognized expert on Low-Power/High-Speed VLSI Design for Signal Processing Systems. He has published over 400 technical papers with numerous best paper awards received from IEEE major conferences and transactions, including the Circuits and Systems Society (CASS) VLSI Transactions Best Paper Award in 2007. He has served as Associate Editor for a few transactions of IEEE with multiple terms and served as various chairs or TPC member for tens of IEEE conferences. In addition, he has deeply participated in many commercial chip designs and has filed over 100 patent applications with tens of them granted in either USA or China. Meanwhile, he has contributed significantly to the industrial standards. So far, his technical proposals and the related key ideas have been adopted by more than 20 international networking standards. He is a Fellow of IEEE and Fellow of AAIA. His major research interests are in the area of optimized VLSI design for deep learning and high-speed communication systems.

References

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  1. ^ "电子科学与工程学院". ese.nju.edu.cn. Retrieved 2024-08-20.