User:SageGreenRider/Jiayuan Fang

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Jiayuan Fang is...^[1]^[2]

References edit

^ "Sigrity Introduces XcitePI Chip IO Interconnect Model Extraction and Assessment Tool". Computer Weekly News – via HighBeam Research (subscription required) . 2012-05-31. Retrieved 2015-03-20.
^ Santarini, Michael (2007-05-22). "Sigrity I/O planner spans IC, package, and PCB". EDN. Retrieved 2015-03-20. According to Jiayuan Fang, president of Sigrity, designers changing the I/O in an IC layout traditionally have had to also implement the change in the package and PCB layouts.

[high_Sigr-1] "Sigrity Introduces XcitePI Chip IO Interconnect Model Extraction and Assessment Tool". Computer Weekly News – via HighBeam Research (subscription required) . 2012-05-31. Retrieved 2015-03-20.

[edn._Sigr-2] Santarini, Michael (2007-05-22). "Sigrity I/O planner spans IC, package, and PCB". EDN. Retrieved 2015-03-20. According to Jiayuan Fang, president of Sigrity, designers changing the I/O in an IC layout traditionally have had to also implement the change in the package and PCB layouts.

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