Template:Intel Data Center GPU Max series

Model[1][2] Launch Code name(s) Process Transistors (billion) Die size
(mm2)
Core config[a] Cache Core clock
(MHz)[b]
Fillrate[c][d] Memory Processing power (TFLOPS) TDP Bus
interface
L1 L2 Pixel
(GP/s)
Texture
(GT/s)
Type Size Bandwidth
(GB/s)
Bus width Clock
(MT/s)
Bfloat16 Single
precision
Double
precision
Data Center GPU Max 1100 Jan 10, 2023 Xe-HPC
(Ponte Vecchio)
Multiple[3] 100 1280 7168:448:0:56:448:448 28 MB 204 MB 1000
1550
0 448.0
694.4
HBM2E 48 GB 1228.8 3072-bit 3200
352
14.336
22.221
300 W PCIe 5.0 x16
Data Center GPU Max 1350 abandoned 14336:896:0:112:896:896 56 MB 408 MB 750
1550
672.0
1388.8
96 GB 2457.6 6144-bit
704
21.504
44.442
450 W
Data Center GPU Max 1550 Jan 10, 2023 16384:1024:0:128:1024:1024 64 MB 408 MB 900
1600
921.6
1638.4
128 GB 3276.8 8192-bit
832
29.491
54.423
600 W
  1. ^ shading cores (ALU):texture mapping units (TMU):render output units (ROP):ray tracing units:tensor cores (XMX):execution Units
  2. ^ Boost values (if available) are stated below the base value in italic.
  3. ^ Pixel fillrate is calculated as the lowest of three numbers: number of ROPs multiplied by the base core clock speed, number of rasterizers multiplied by the number of fragments they can generate per rasterizer multiplied by the base core clock speed, and the number of streaming multiprocessors multiplied by the number of fragments per clock that they can output multiplied by the base clock rate.
  4. ^ Texture fillrate is calculated as the number of texture mapping units (TMUs) multiplied by the base (or boost) core clock speed.