Talk:Latch-up

LPC circuit question

Is "LPC circuit" a case of RAS syndrome, inconsistent with its apparent definition ("Latchup Protection Technology circuit"), or just a typo? - 24.10.140.179 04:54, 22 January 2007 (UTC)

From the analog devices page

Hey, this article comes mainly from the analog devices page. Probably should cite that as a source just in case they change the page, or just in case. 71.206.12.121 (talk) 15:53, 1 July 2008 (UTC)

two kinds of problems

Currently this "latch-up" page discusses two kinds of problems:

• One problem is relatively temporary:

the article says "A power cycle is required to correct this situation."

• The other problem is permanent:

the article says "... resulting in destruction of the chip".

My understanding is that:

• Early CMOS processes had the "destruction" problem.
• Many (most?) modern CMOS processes are specifically designed to be immune to the "destruction" problem, but latchup can still occur and requires power-cycle to clear.
• A few modern CMOS processes (silicon-on insulator, etc.) are completely immune to any kind of latchup.

Is there a common word or phrase to distinguish between (a) devices that, after a power-cycle, are as good as new, vs. (b) devices that are permanently damaged and will never again work correctly, no matter how many times they are power-cycled? --DavidCary (talk) 01:39, 25 July 2021 (UTC)