Incisive is a suite of tools from Cadence Design Systems related to the design and verification of ASICs, SoCs, and FPGAs. Incisive is commonly referred to by the name NCSim in reference to the core simulation engine. In the late 1990s, the tool suite was known as ldv (logic design and verification).
| Developer(s) | Cadence Design Systems |
|---|---|
| Operating system | Linux |
| Type | Simulator |
| License | proprietary |
| Website | Cadence Functional Verification |
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Depending on the design requirements, Incisive has many different bundling options of the following tools:
| Tool | command | description |
|---|---|---|
| NC Verilog | ncvlog | Compiler for Verilog 95, Verilog 2001, SystemVerilog and Verilog-AMS |
| NC VHDL | ncvhdl | Compiler for VHDL 87, VHDL 93 |
| NC SystemC | ncsc | Compiler for SystemC |
| NC Elaborator | ncelab | Unified linker / elaborator for Verilog, VHDL, and SystemC libraries. Generates a simulation object file referred to as a snapshot image. |
| NC Sim | ncsim | Unified simulation engine for Verilog, VHDL, and SystemC. Loads snapshot images generated by NC Elaborator. This tool can be run in GUI mode or batch command-line mode. In GUI mode, ncsim is similar to the debug features of ModelSim's vsim. |
| Irun | irun | Executable for single step invocation. Calls ncvlog/ncvhdl/ncsc automatically depending on given files and their extensions. Afterwards ncelab and ncsim are executed. |
| Sim Vision | simvision | A standalone graphical waveform viewer and netlist tracer. This is very similar to Novas Software's Debussy. |