Draft:Quantum dot transistor

• Comment: There is nothing to eat indicate notability. The first link does not want to open for me, and the second is a blog. Ldm1954 (talk) 17:52, 2 December 2023 (UTC)

---

In the context of fabricating field-effect transistors (FETs) using quantum dots (QDs), there are two fundamental design architectures. The first, known as the bottom-gate configuration, is characterized by the use of a heavily doped silicon substrate as the gate, separated from the QD layer by a silicon dioxide (SiO2) insulator. Source and drain electrodes are applied to this system using pre-patterning techniques using optical lithography and metallization by evaporation, or post-patterning through shadow mask evaporation techniques. The QD layer is then deposited on the substrate using methods such as drop casting or spin coating. Alternatively, the second configuration involves a top-gate architecture. In this method, after the electrodes and QD layer are deposited, an additional layer of insulating material, such as SiO2, Al2O3, or ionic gels, is applied to isolate the gate electrode from the underlying QD layer. During electrical characterization, a voltage is applied to both the gate and drain, with the source grounded to allow electron charges to flow.

FETs built on silicon substrates are widely used in materials testing due to their reliability and well-studied properties. However, growing interest in building FET transistors on polymer substrates has been observed. Studies indicate that such polymer FETs are effective in testing and present significant potential for using QDs in the creation of electronic circuits on flexible, cost-effective materials. In addition, these developments underscore the benefits of using low temperatures in the fabrication of quantum dot FETs, which is crucial for the development of flexible and wearable electronic technologies.