The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture, which used two chips–a northbridge and southbridge, and first appeared in the Intel 5 Series.
![](http://upload.wikimedia.org/wikipedia/commons/5/53/Intel_5_Series_architecture.png)
The PCH controls certain data paths and support functions used in conjunction with Intel CPUs. These include clocking (the system clock), Flexible Display Interface (FDI) and Direct Media Interface (DMI), although FDI is used only when the chipset is required to support a processor with integrated graphics. As such, I/O functions are reassigned between this new central hub and the CPU compared to the previous architecture: some northbridge functions, the memory controller and PCIe lanes, were integrated into the CPU while the PCH took over the remaining functions in addition to the traditional roles of the southbridge. AMD has its equivalent for the PCH, known simply as a chipset since the release of the Zen architecture in 2017.[1] AMD no longer uses its equivalent for the PCH, the Fusion controller hub (FCH).
Overview
editThe PCH architecture supersedes Intel's previous Hub Architecture, with its design addressing the eventual problematic performance bottleneck between the processor and the motherboard. Under the Hub Architecture, a motherboard would have a two piece chipset consisting of a northbridge chip and a southbridge chip. Over time, the speed of CPUs kept increasing but the bandwidth of the front-side bus (FSB) (connection between the CPU and the motherboard) did not, resulting in a performance bottleneck.[2]
As a solution to the bottleneck, several functions belonging to the traditional northbridge and southbridge chipsets were rearranged. The northbridge and its functions are now eliminated completely: The memory controller, PCI Express lanes for expansion cards and other northbridge functions are now incorporated into the CPU die as a system agent (Intel) or packaged in the processor on an I/O die (AMD Zen 2).
The PCH then incorporates a few of the remaining northbridge functions (e.g. clocking) in addition to all of the southbridge's functions, replacing it. The system clock was previously a connection to a dedicated chip but is now incorporated into the PCH. Two different connections exist between the PCH and the CPU: Flexible Display Interface (FDI) and Direct Media Interface (DMI). The FDI is used only when the chipset requires supporting a processor with integrated graphics. The Intel Management Engine was also moved to the PCH starting with the Nehalem processors and 5-Series chipsets. AMD's chipsets instead use several PCIe lanes to connect with the CPU while also providing their own PCIe lanes, which are also provided by the processor itself.[3][4] The chipset also contains the Nonvolatile BIOS memory.
With the northbridge functions integrated to the CPU, much of the bandwidth needed for chipsets is now relieved.
This style began in Nehalem and will remain for the foreseeable future, through Cannon Lake.
Phase-out
editBeginning with ultra-low-power Haswells and continuing with mobile Skylake processors, Intel incorporated the southbridge IO controllers into the CPU package, eliminating the PCH for a system in package (SOP) design with two dies; the larger die being the CPU die, the smaller die being the PCH die.[5] Rather than DMI, these SOPs directly expose PCIe lanes, as well as SATA, USB, and HDA lines from integrated controllers, and SPI/I²C/UART/GPIO lines for sensors. Like PCH-compatible CPUs, they continue to expose DisplayPort, RAM, and SMBus lines. However, a fully integrated voltage regulator will be absent until Cannon Lake.[needs update]
AMD's FCH has been discontinued since the release of the Carrizo series of CPUs as it has been integrated into the same die as the rest of the CPU.[6] However, since the release of the Zen architecture, there's still a component called a chipset which only handles relatively low speed I/O such as USB and SATA ports and connects to the CPU with a PCIe connection. In these systems all PCIe connections are routed directly to the CPU.[7] The UMI interface previously used by AMD for communicating with the FCH is replaced with a PCIe connection. Technically the processor can operate without a chipset; it only continues to be present for interfacing with low speed I/O.[8] AMD server CPUs adopt a self contained system on chip design instead which doesn't require a chipset.[9][10][11]
Ibex Peak
editThe Intel 5 Series chipsets were the first to introduce a PCH. This first PCH is codenamed Ibex Peak.
This has the following variations:
- BD3400 (PCH 3400) Server
- BD3420 (PCH 3420) Server
- BD3450 (PCH 3450) Server
- BD82P55 (PCH P55) Desktop Base
- BD82H55 (PCH H55) Desktop Home
- BD82H57 (PCH H57) Desktop Home
- BD82Q57 (PCH Q57) Desktop Office
- BD82PM55 (PCH PM55) Mobile Base
- BD82HM55 (PCH HM55) Mobile Home
- BD82HM57 (PCH HM57) Mobile Home
- BD82QM57 (PCH QM57) Mobile Office
- BD82QS57 (PCH QS57) Mobile SFF
Issues
edit- Bogus USB ports will be detected by desktop PCHs equipped with 6 USB ports (3420, H55) on the first EHCI controller. This can happen when AC power is removed after entering ACPI S4. Applying AC power back and resuming from S4 may result in non detected or even non functioning USB device (erratum 12)
- Bogus USB ports will be detected by mobile PCH equipped with 6 USB ports (HM55) on the first EHCI controller. This can happen when AC power and battery are removed after entering ACPI S4. Applying AC power or battery back and resuming from S4 may result in non detected or even non functioning USB device (erratum 13)
- Reading the HPET comparator timer immediately after a write returns the old value (erratum 14)
- SATA 6 Gbit/s devices may not be detected at cold boot or after ACPI S3, S4 resume (erratum 21)
Langwell
editLangwell is the codename of a PCH in the Moorestown MID/smartphone platform.[12][13] for Atom Lincroft microprocessors.
This has the following variations:
- AF82MP20 (PCH MP20)
- AF82MP30 (PCH MP30)
Tiger Point
editTiger Point is the codename of a PCH in the Pine Trail netbook platform chipset for Atom Pineview microprocessors.
This has the following variations:
- CG82NM10 (PCH NM10)
Topcliff
editTopcliff is the codename of a PCH in the Queens Bay embedded platform chipset for Atom Tunnel Creek microprocessors.
It connects to the processor via PCIe (vs. DMI as other PCHs do).
This has the following variations:
- CS82TPCF (PCH EG20T)
Cougar Point
editCougar Point is the codename of a PCH in Intel 6 Series chipsets for mobile, desktop, and workstation / server platforms. It is most closely associated with Sandy Bridge processors.
This has the following variations:
- BD82C202 (PCH C202) Server
- BD82C204 (PCH C204) Server
- BD82C206 (PCH C206) Workstation / Server
- BD82P67 (PCH P67) Desktop Base
- BD82H67 (PCH H67) Desktop Home
- BD82H61 (PCH H61) Desktop Home
- BD82Z68 (PCH Z68) Combined desktop base and home
- BD82B65 (PCH B65) Desktop Office
- BD82Q67 (PCH Q67) Desktop Office
- BD82Q65 (PCH Q65) Desktop Office
- BD82HM65 (PCH HM65) Mobile Home
- BD82HM67 (PCH HM67) Mobile Home
- BD82QM67 (PCH QM67) Mobile Office
- BD82QS67 (PCH QS67) Mobile SFF
- BD82UM67 (PCH UM67) Ultra Mobile
Issues
editThis section's factual accuracy may be compromised due to out-of-date information. (December 2012) |
In the first month after Cougar Point's release, January 2011, Intel posted a press release stating a design error had been discovered. Specifically, a transistor in the 3 Gbit/s PLL clocking tree was receiving too high voltage. The projected result was a 5–15% failure rate within three years of 3 Gbit/s SATA ports, commonly used for storage devices such as hard drives and optical drives. The bug was present in revision B2 of the chipsets, and was fixed with B3. Z68 did not have this bug, since the B2 revision for it was never released. 6 Gbit/s ports were not affected. This bug was especially a problem with the H61 chipset, which only had 3 Gbit/s SATA ports. Through OEMs, Intel plans to repair or replace all affected products at a cost of $700 million.[14][15]
Nearly all produced motherboards using Cougar Point chipsets were designed to handle Sandy Bridge, and later Ivy Bridge, processors. ASRock produced one motherboard for LGA 1156 processors, based on P67 chipset, the P67 Transformer. It exclusively supports Lynnfield Core i5/i7 and Xeon processors, using LGA 1156 socket. After revision B2 of Cougar Point chipsets was recalled, ASRock decided not to update the P67 Transformer motherboard, and was discontinued. Some small Chinese manufacturers are producing LGA 1156 motherboards with H61 chipset.
Whitney Point
editWhitney Point is the codename of a PCH in the Oak Trail tablet platform for Atom Lincroft microprocessors.
This has the following variations:
- 82SM35 (PCH SM35)
Panther Point
editPanther Point is the codename of a PCH in Intel 7 Series chipsets for mobile and desktop. It is most closely associated with Ivy Bridge processors. These chipsets (except PCH HM75) have integrated USB 3.0.[16]
This has the following variations:
- BD82C216 (PCH C216) Workstation/Server
- BD82H77 (PCH H77) Desktop Home
- BD82Z77 (PCH Z77) Combined desktop base and home
- BD82Z75 (PCH Z75) Combined desktop base and home
- BD82B75 (PCH B75) Desktop Office
- BD82Q77 (PCH Q77) Desktop Office
- BD82Q75 (PCH Q75) Desktop Office
- BD82HM77 (PCH HM77) Mobile Home
- BD82HM76 (PCH HM76) Mobile Home
- BD82HM75 (PCH HM75) Mobile Home
- BD82HM70 (PCH HM70) Mobile Home
- BD82QM77 (PCH QM77) Mobile Office
- BD82QS77 (PCH QS77) Mobile Office
- BD82UM77 (PCH UM77) Ultra Mobile
Cave Creek
editCave Creek is the codename of the PCH most closely associated with Crystal Forest platforms and Gladden[17] or Sandy Bridge-EP/EN[18] processors.
Patsburg
editPatsburg is the codename of a PCH in Intel 7 Series chipsets for server and workstation using the LGA 2011 socket. It was initially launched in 2011 as part of Intel X79 for the desktop enthusiast Sandy Bridge-E processors in Waimea Bay platforms.[19] Patsburg was then used for the Sandy Bridge-EP server platform (the platform was codenamed Romley and the CPUs codenamed Jaketown, and finally branded as Xeon E5-2600 series) launched in early 2012.[20]
Launched in the fall of 2013, the Ivy Bridge-E/EP processors (the latter branded as Xeon E5-2600 v2 series) also work with Patsburg, typically with a BIOS update.[21][22]
Patsburg has the following variations:
Coleto Creek
editColeto Creek is the codename of the PCH most closely associated with Highland Forest platforms and Ivy Bridge-EP[23] processors.
Lynx Point
editLynx Point is the codename of a PCH in Intel 8 Series chipsets, most closely associated with Haswell processors with LGA 1150 socket.[24] The Lynx Point chipset connects to the processor primarily over the Direct Media Interface (DMI) interface.[25]
The following variants are available:[26]
- DH82C222 (PCH C222) Workstation/Server
- DH82C224 (PCH C224) Workstation/Server
- DH82C226 (PCH C226) Workstation/Server
- DH82H81 (PCH H81) Desktop Home
- DH82H87 (PCH H87) Desktop Home
- DH82Z87 (PCH Z87) Combined desktop base and home
- DH82B85 (PCH B85) Desktop Office
- DH82Q87 (PCH Q87) Desktop Office
- DH82Q85 (PCH Q85) Desktop Office
- DH82HM87 (PCH HM87) Mobile Home
- DH82HM86 (PCH HM86) Mobile Home
- DH82QM87 (PCH QM87) Mobile Office
In addition the following newer variants are available, additionally known as Wildcat Point, which also support Haswell Refresh processors:[27]
Issues
editA design flaw causes devices connected to the Lynx Point's integrated USB 3.0 controller to be disconnected when the system wakes up from the S3 state (Suspend to RAM), forcing the USB devices to be reconnected although no data is lost.[28][29] This issue is corrected in C2 stepping level of the Lynx Point chipset.[30]
Wellsburg
editWellsburg is the codename for the C610-series PCH, supporting the Haswell-E (Core i7 Extreme), Haswell-EP (Xeon E5-16xx v3 and Xeon E5-26xx v3), and Broadwell-EP (Xeon E5-26xx v4) processors. Generally similar to Patsburg, Wellsburg consumes only up to 7 W when fully loaded.[31]
Wellsburg has the following variations:
- DH82029 (PCH C612), intended for servers and workstations
- DHX99 (PCH X99), intended for enthusiasts making use of Intel Core i7 59/69XX processors but it is compatible with LGA 2011-3 Xeons.
Sunrise Point
editSunrise Point is the codename of a PCH in Intel 100 Series chipsets, most closely associated with Skylake processors with LGA 1151 socket.
The following variants are available:[32]
- GL82C236 (PCH C236) Workstation/Server
- GL82H110 (PCH H110) Desktop Home
- GL82H170 (PCH H170) Desktop Home (Note the datasheet linked one that page is incorrect, see via PCH HM170 below)
- GL82Z170 (PCH Z170) Combined desktop base and home
- GL82B150 (PCH B150) Desktop Office
- GL82Q150 (PCH Q150) Desktop Office
- GL82Q170 (PCH Q170) Desktop Office
- GL82HM170 (PCH HM170) Mobile Home
- GL82CM236 (PCH CM236) Mobile Workstation
- GL82QM170 (PCH QM170) Mobile Office
Union Point
editUnion Point is the codename of a PCH in Intel 200 Series chipsets, most closely associated with Kaby Lake processors with LGA 1151 socket.
The following variants are available:[33]
Lewisburg
editLewisburg is the codename for the C620-series PCH, supporting LGA 2066 socketed Skylake-X/Kaby Lake-X processors ("Skylake-W" Xeon).
Lewisburg has the following variations:
- EY82C621 (PCH C621), intended for servers and workstations
- EY82C622 (PCH C622), intended for servers and workstations
- EY82C624 (PCH C624), intended for servers and workstations
- EY82C625 (PCH C625), intended for servers and workstations
- EY82C626 (PCH C626), intended for servers and workstations
- EY82C627 (PCH C627), intended for servers and workstations
- EY82C628 (PCH C628), intended for servers and workstations
Basin Falls
editBasin Falls is the codename for the C400-series PCH, supporting Skylake-X/Kaby Lake-X processors (branded Core i9 Extreme and "Skylake-W" Xeon). Generally similar to Wellsburg, Basin Falls consumes only up to 6 W when fully loaded.
Basin Falls has the following variations:
Cannon Point
editCannon Point is the codename of a PCH in Intel 300 Series chipsets, most closely associated with Coffee Lake processors with LGA 1151 socket.[34]
The following variants are available:[35]
Comet Lake PCH
editThis section is empty. You can help by adding to it. (August 2021) |
Rocket Lake PCH
editThis section is empty. You can help by adding to it. (August 2021) |
Alder Lake PCH
editRaptor Lake PCH
editSee also
edit- List of Intel chipsets
- Intel Management Engine (ME)
- I/O Controller Hub (ICH)
- PCI IDE ISA Xcelerator (PIIX)
- System Controller Hub (SCH)
- Embedded controller (EC)
References
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- ^ Hook, Brian (17 September 2003). "Breaking the Speed Barrier: The Frontside Bus Bottleneck". Technewsworld. Retrieved 1 February 2016.
- ^ Bonshor, Gavin. "The AMD TRX40 Motherboard Overview: 12 New Motherboards Analyzed". www.anandtech.com.
- ^ Burke, Steve. "AMD X570 vs. X470, X370 Chipset Comparison, Lanes, Specs, & Differences". www.gamersnexus.net.
- ^ Cutress, Ian. "Intel Releases Broadwell-U: New SKUs, up to 48 EUs and Iris 6100". www.anandtech.com.
- ^ "AMD at ISSCC 2015: Carrizo and Excavator Details".
- ^ "AMD Zen 4 Ryzen 9 7950X and Ryzen 5 7600X Review: Retaking the High-End".
- ^ "The AMD Zen and Ryzen 7 Review: A Deep Dive on 1800X, 1700X and 1700".
- ^ https://www.amd.com/system/files/documents/4th-gen-epyc-processor-architecture-white-paper.pdf [bare URL PDF]
- ^ Kennedy, Patrick (2019-04-08). "Supermicro M11SDV-4C-LN4F Review mITX AMD EPYC 3151 Platform". ServeTheHome. Retrieved 2024-08-18.
- ^ Cutress, Andrei Frumusanu, Dr Ian. "AMD 3rd Gen EPYC Milan Review: A Peak vs Per Core Performance Balance". www.anandtech.com. Retrieved 2024-08-18.
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- ^ New Intel Atom Processor-Based Platform Using Significantly Lower Power Readies Intel for Smartphone, Tablet Push, Intel, May 4, 2010, retrieved 2010-07-27
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- ^ The Source of Intel's Cougar Point SATA Bug, AnandTech, 31 January 2011
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